The present invention relates to a storage medium in which data regarding designing to be supplied to a computer (electronic computer) executing a predetermined program to design a circuit to be formed on a semiconductor chip is stored and a method of fabricating a semiconductor integrated circuit. For example, the invention relates to a technique effective for use in designing and fabricating of a microcomputer or the like.
At the time of designing a semiconductor integrated circuit or the like, a collection of computing functions, signal control functions, and the like to be provided in the circuit is called a block (or module or core). The blocks include a hard macro block (or hard module or hard core) for providing, as a part, data indicative of a plurality of mask patterns for forming a layout to a chip designer after completion of designing the layout of the portion. Recently, such a hard macro block is also called a hardware IP (Intellectual Property) module. In the case of providing such a hard macro to a chip designer, as data expressing the hard macro block, together with data describing the function of the block (circuit) in a computer language such as HDL (Hardware Description Language), data of a mask pattern expressing the layout of the circuit (for example, drawing data for forming a mask pattern), and the like is provided. In contrast to such a hard macro block, there is a block called a soft macro block (or software module or software core). In the soft macro block, the function of the block (circuit) is specified by description in the HDL or the like and the description is provided as a part to a chip designer. Such a soft macro block is also called a software IP module in contrast to the hardware IP module. There is a case such that the circuit scale of the macro block such as the hardware IP module or software IP module is as large as a unit of function of an SRAM (Static Random Access Memory), DRAM (Dynamic Random Access Memory), CPU (Central Processing Unit), DSP (Digital Signal Processor), or the like.
The hard macro block such as the hardware IP module includes, as data to be provided to the designer, information regarding a mask pattern for forming a verified layout pattern. Consequently, even the circuit characteristics of the block (circuit) provided as the hardware IP module are guaranteed. At the time of designing a microcomputer, a system LSI, or the like, by using data of a hard macro block such as the hardware IP module as a past design asset, a designing and verification period can be largely shortened. The function describing data in the HDL or the like included in the hardware IP module is used to verify, for example, a logic operation of a configuration in which the hardware IP module and the outside are integrated when the hardware IP module and the outside are connected to each other.
The hardware IP or the like is described in xe2x80x9cVerification on System LSI using IP corexe2x80x9d in Nikkei Electronics No. 723, Aug. 10, 1998, pp. 99 to 109.
The inventors of the present invention have examined a use of data of the hardware IP module, software IP module, and the like for designing of a semiconductor integrated circuit. For example, by adding a peripheral function corresponding to a required specification of the user to the CPU as a core of a microcomputer, the microcomputer can be developed as a product. At this time, by re-using a designed hardware IP module as a peripheral circuit module to shorten the design period, the design period until the layout can be shortened as described above.
In the case of using the hardware IP module, since designing up to a mask pattern for forming a layout pattern of a circuit has been completed, the function and performance of the circuit is stable and the small number of designing steps is sufficient. In the hard macro block such as a hardware IP module, however, a circuit of a relatively high driving capability is used to guarantee its operation irrespective of an actual external load. It therefore counts against a request such as reduction in power consumption or reduction in chip occupied area. However, in the case of adopting a circuit of a driving capability according to an external load for an interface section, a problem such that it becomes difficult to re-use data of the mask pattern included in the hardware IP module arises. It is not easy to change the shape of a layout pattern of a part of the-hardware IP module in which the mask pattern has been completed and to guarantee the operation.
On the other hand, by using a software IP module, designing according to an external load can be performed for the interface section. However, since the performances such as timing depend on a layout, high reliability in functions is not always obtained only by the software IP module. Since layout is designed so that timings and the like are satisfied in a whole block, a problem such that a number of designing steps is necessary to complete the designing of the mask pattern which specifies the layout.
An object of the invention is to provide a storage medium in which designing information that can be contributed to increase in efficiency of a process of designing a semiconductor integrated circuit by using a computer is stored.
Another object of the invention is to provide a storage medium in which designing data is stored, which can guarantee function and performance of a circuit more than the case where all modules are software modules, has the degree of freedom in designing higher than the case where all modules are hardware modules, and can contribute to reduction in the number of designing steps.
Further another object of the invention is to provide a storage medium in which designing data enabling power consumption and/or a chip occupying area of a module which can be re-used in a semiconductor integrated circuit to be reduced is stored.
Further another object of the invention is to provide a method of fabricating a semiconductor integrated circuit capable of reducing power consumption and/or chip occupying area.
The above and other objects and novel features of the invention will become apparent from the following description of the specification and the attached drawings.
A storage medium according to the invention is a storage medium in which data for designing an integrated circuit to be formed on a semiconductor chip by using a computer is stored so as to be read by the computer. The data stored in the storage medium includes: first data for determining a figure pattern for forming a first circuit out of a plurality of circuits constructing the integrated circuit onto the semiconductor chip; second data for determining a function of a second circuit out of the plurality of circuits constructing the integrated circuit; and third data for determining a relation of connecting the first circuit and the second circuit.
The first data is, for example, data for forming a mask pattern of an integrated circuit. In a manner similar to the data of the hard module, the data has a stable nature from the point such that the functions and performances of a circuit specified by the data are. already verified. By using the first data for designing an integrated circuit, high reliability on the functions and performances can be guaranteed to the first circuit in the integrated circuit with a small number of designing steps.
The second data is, for example, one or plural data selected from a register level, a transistor level, and a net list which determine the function of the second circuit. In a manner similar to the data of the software module, stability of the functions and performances of a circuit specified by the second data is not guaranteed as much as the case of the hardware module. On the other hand, the degree of freedom in designing regarding the driving capability and the like of a circuit is guaranteed. By using the second data for designing the integrated circuit, the degree of freedom in designing regarding the driving capability and the like of the circuit is guaranteed to the second circuit in the integrated circuit and, finally, the figure pattern of the second circuit can be designed.
The third data is, for example, data for associating a terminal name of a terminal included in the first circuit and a net name of a net included in the second circuit. By using the third data for designing an integrated circuit, the figure pattern of the first circuit and the figure pattern of the second circuit designed by using different design data as start points can be integrated.
By loading the data stored in the storage medium into a computer and using the data for designing an integrated circuit, the functions and performances of the circuit can be guaranteed more than the case where all of data is software modules, the degree of freedom in designing can be made higher than the case where all of data is hardware modules, and the number of designing steps can be reduced. Therefore, the invention can increase the efficiency of a process of designing a semiconductor integrated circuit by using a computer.
The data can further include fourth data indicative of characteristics and/or functions of a terminal in the first circuit. Since the terminal of the first circuit is connected to the second circuit, the fourth data becomes data allowing the characteristics and/functions in a terminal of the first circuit to be seen from the second circuit. Consequently, for example, the data can be used as data for verifying the characteristics and/or functions of the circuit including another circuit connected to the second circuit.
When the integrated circuit is constructed by at least one module and other circuits and the first and second circuits construct the one module, the first to third data can be stored in a storage medium, as data of a unit of the module. Consequently, the first to third data can be positioned as part data on the module unit, for example, an IP part.
For example, when the first circuit is a core circuit achieving a predetermined function, the second circuit can take the form of a buffer circuit for interfacing the first circuit to another circuit. It is the best way to use the circuit pattern of which functions and performances are guaranteed as it is for the core circuit often requested to have the high-level functions and performances. In contrast, the functions of the buffer circuit are simpler than those of the first circuit as a core. It is accordingly relatively easy to assure necessary performances. When the circumstances where a circuit of which performances and functions cannot be preliminarily specified is to be connected on the outside of the module are taken into account, by using the first to third data as part data on a module unit basis such as an IP part, while maintaining the functions and performances in the core portion of the module as they are, the interface can be designed so as to address requests of lower power consumption, reduced chip area, and the like in accordance with an external load with the relatively small number of steps.
The third data out of data stored in the storage medium and provided can be entered from an input device of a computer in place of loading the data from the storage medium. In place of the second data, it is also possible to store a program for supporting a process of describing the function of a second circuit to be connected to the first circuit in a computer language together with the first data into a storage medium, and provide the storage medium.
At the time of fabricating a semiconductor integrated circuit having a module including the first circuit and the second circuit, according to a request of a circuit to be connected to the module or a request to the module itself, a step of determining the characteristics of the second circuit is added to the method of fabricating a semiconductor integrated circuit. Consequently, reduction in chip area and/or reduction in power consumption can be realized in accordance with a request.
The step is, for example, for selecting a circuit according to a request from a plurality of circuits having substantially the same function but different driving capabilities, power consumption, and the like. More specifically, when the second circuit is defined at the RTL (Register Transfer Level) in the HDL or the like, description in the HDL or the like corresponds to the second data. By performing logic synthesis between the second data and a cell library for logic synthesis, a net list is generated. The process corresponds to a process of selecting a cell according to a request from the cell library for logic synthesis.
It is also possible to store only the third information into a storage medium and provide the storage medium. In the case where the first and second information is already provided, when the third information for connecting the first and second information is provided, while assuring high reliability as described above, the number of designing steps can be reduced.